Wiring substrate and manufacturing method thereof
US9666542B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 24, 2014 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Apr 16, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wiring substrate is provided with a support substrate (31), an insulating layer (32), and a wiring layer (33). The support substrate (31) is formed with a hole (34) including an opening portion in one surface of the support substrate (31). The insulating layer (32) is formed on a surface of the support substrate (31) opposite to the one surface thereof including the opening portion. The wiring layer (33) includes a wiring pattern of a predetermined structure on the insulating layer (32). Further, an orthographic projection to be obtained when the wiring pattern is projected on a predetermined surface of the support substrate (31), and an orthographic projection to be obtained when the hole (34) is projected on the predetermined surface of the support substrate (31) include a shared portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.