Apparatuses and methods including a superjunction transistor
US9666667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Oct 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/512
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Aspects of the present disclosure are directed toward apparatuses, methods, and systems that include at least two regions of a first semiconductor material and at least two regions of second semiconductor material that are alternatively interleaved. Additionally, the apparatuses, methods, and systems include a first electrode and a second electrode that can operate both as a source and drain. The apparatuses, methods, and systems also include a first gate electrode having multiple portions on the first semiconductor material and a second gate electrode having multiple portions on the second semiconductor material that bidirectionally control current flow between the first electrode and the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.