High performance integrated tunable impedance matching network with coupled merged inductors
US9667217B2 · kind B2 · utility
4Cited by
2References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Apr 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2007/386
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.