Fast frequency divider circuit using combinational logic
US9667231B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2016 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Mar 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K21/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The various technologies presented herein relate to performing on-chip frequency division of an operating frequency of a ring oscillator (RO). Per the various embodiments herein, a conflict between RO size versus operational frequency can be addressed by dividing the output frequency of the RO to a frequency that can be measured on-chip. A frequency divider circuit (comprising NOR gates and latches, for example) can be utilized in conjunction with the RO on the chip. In an embodiment, the frequency divider circuit can include a pair of latches coupled to the RO to facilitate dividing the oscillating frequency of the RO by 2. In another embodiment, the frequency divider circuit can include four latches (operating in pairs) coupled to the RO to facilitate dividing the oscillating frequency of the RO by 4. A plurality of ROs can be MUXed to the plurality of ROs by a single oscillation-counting circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.