Programmable repeater circuits and methods
US9667314B1 · kind B1 · utility
0Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Dec 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/18
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a buffer circuit, a receiving circuit, and a programmable repeater circuit. The programmable repeater circuit includes a routing input and an enable input. The programmable repeater circuit buffers an input signal received at the routing input from the buffer circuit through a first conductor to generate an output signal that is provided to an input of the receiving circuit through a second conductor only in response to an enable signal at the enable input enabling the programmable repeater circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.