Channel estimator, demodulator and method for channel estimation
US9667449B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Dec 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/26526
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A channel estimator, comprises: a receiver receives a first time-domain training sequence; a first convolution circuit generates an estimated value for the first time-domain training sequence by convoluting a second time-domain training sequence with a current channel estimation value; a first subtractor generates an error by subtracting the estimated value for the first time-domain training sequence from the value of the first time-domain training sequence; an updating circuit generates an updated channel estimation value by updating the current channel estimation value with the error; the receiver iteratively receives a next symbol of the first time-domain training sequence, the first convolution circuit, the subtractor and the updating circuit repeat their operation until completion of receipt of a last symbol of the first time-domain training sequence. The updating circuit outputs the current updated channel estimation value upon completion of receipt of a last first time-domain training sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.