System and method for large dimension equalization using small dimension equalizers and bypassed equalizers
US9667455B1 · kind B1 · utility
2Cited by
2References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 23, 2016 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Mar 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03522
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An equalizer circuit of a particular equalization stage of a equalizer circuit is omitted, and input signals that would have otherwise been received at the omitted equalization circuit bypass the equalization stage and are instead processed at an equalizer circuit included at the next stage. Thus, a subset of the received frequency-domain signals can be processed by equalizer circuits at a first stage, while the remaining received frequency-domain signals bypass the first stage and are processed at an equalizer circuit included at a second stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.