Array substrate, display panel and method for detecting the array substrate
US9671450B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2015 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Oct 22, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The disclosure is related to an array substrate, a display panel and a method for detecting the array substrate. The array substrate comprises a plurality of pixels arranged in an array. Each of the pixels comprises a plurality of sub-pixels arranged in sequence. Each of the sub-pixels is arranged opposite to a capacitor at an interval. Each sub-pixel comprises a sub-pixel electrode. At least one sub-pixel electrode comprises an extension portion. At least one extension portion of the sub-pixel electrode of the sub-pixel is arranged corresponding to the space between the adjacent sub-pixel and the capacitor corresponding to the adjacent sub-pixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.