Processing system and method of instruction set encoding space utilization
US9672042B2 · kind B2 · utility
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4References
14Claims
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Key dates
| Filing date | May 29, 2012 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Aug 20, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing system comprises a processing device; a first instruction set encoded in a first encoding space and comprising one or more first instructions; a second instruction set encoded in a second encoding space different from the first encoding space and comprising two or more orthogonal second instructions; and an instruction encoder arranged to encode and encapsulate subsets of the second instructions in instruction containers, each instruction container sized to comprise a plurality of the second instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.