Apparatus and method for intelligently powering heterogeneous processor components
US9672046B2 · kind B2 · utility
2Cited by
10References
32Claims
0Family size
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Key dates
| Filing date | Dec 28, 2012 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Apr 15, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An intelligent power allocation architecture for a processor. For example, one embodiment of a processor comprises: a plurality of processor components for performing a corresponding plurality of processor functions; a plurality of power planes, each power plane associated with one of the processor components; and a power control unit (PCU) to dynamically adjust power to each of the power planes based on user experience metrics, workload characteristics, and power constraints for a current use of the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.