Pedestal construction with low coefficient of thermal expansion top
US9673077B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Nov 30, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53178
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A support assembly for use in semiconductor processing includes an application substrate, a heater layer disposed directly onto the application substrate, an insulation layer disposed onto the heater layer, and a second substrate disposed onto the insulation layer. The heater layer is directly disposed onto the application substrate by a layered process such that the heater layer is in direct contact with the application substrate. The application substrate defines a material having a relatively low coefficient of thermal expansion that is matched to a coefficient of thermal expansion of the heater layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.