Integrated circuits with non-volatile memory and methods of producing the same
US9679905B1 · kind B1 · utility
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19Claims
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Key dates
| Filing date | Apr 8, 2016 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Apr 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuits and methods of producing the same are provide. In an exemplary embodiment, a method includes determining a memory area of the integrated circuit, and forming a select layer overlying the substrate. A portion of the select layer is selectively etched to form a select gate within the memory area. A concentration of an indicator is measured in an etch off-gas during the selective etching of the select layer, and the selective etching of the select layer is terminated when the concentration of the indicator crosses an end point determination concentration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.