Systems and methods of low power clocking for sleep mode radios
US9680413B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2012 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Mar 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0082
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods of low power clocking of sleep mode radios are disclosed herein. In an example embodiment, a crystal oscillator is purposefully mistuned to achieve lower power consumption, and then synchronized using a high frequency crystal oscillator. In an alternative embodiment, the input offset voltages of the comparator in an RC oscillator are cancelled, which allows low power operation and high accuracy performance when tuned to the high frequency crystal. A lower power comparator may be used with higher input offset voltages but still achieve higher accuracy. The RC circuit is switched back and forth on opposite phases of the output, cancelling the offset voltage on the inputs of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.