Under-sampling digital pre-distortion architecture
US9680423B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Mar 14, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A amplifier system may include a predistorter receiving an input signal to generate a predistortion signal, a first converter receiving the predistortion signal to generate a preamplified signal, a power amplifier receiving the preamplified signal to generate an output signal based on the preamplified signal and the input signal, and a second converter sampling the output signal to generate a feedback signal. The power amplifier may produce a distortion signal at a first frequency, the second converter may sample the output signal using a timing signal with a second frequency that is lower than the first frequency to generate the feedback signal, and the predistorter, based upon the feedback signal, may predistort the predistortion signal to reduce the distortion signal at the first frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.