Data conversion
US9680495B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2017 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Feb 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/22
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data conversion system and method are described. A first phase locked loop includes a controllable frequency oscillator circuit to receive a digital data stream and output a reference frequency signal, and includes an oscillator and at least one variable load connected to the oscillator which is controllable to tune the oscillator frequency and vary the frequency of the reference frequency signal. A second phase locked loop includes a divide by N function in a feedback loop (where N has an integer value), and receives the reference frequency signal and outputs a recovered clock signal corresponding to an original clock signal associated with the digital data stream. The recovered clock signal is used to clock a data converter to convert the digital data into an analog output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.