Secure hashing device using multiple different SHA variants and related methods
US9680637B2 · kind B2 · utility
0Cited by
8References
18Claims
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Key dates
| Filing date | May 1, 2009 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Feb 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A monolithic integrated circuit (IC) secure hashing device may include a memory, and a processor integrated with the memory. The processor may be configured to receive a message, and to process the message using a given secure hash algorithm (SHA) variant from among different SHA variants. The different SHA variants may be based upon corresponding different block sizes of bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.