Substrate structure and display panel using same
US9681545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2016 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Jun 20, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10136
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate structure includes a first substrate, a plurality of first bonding pads, a second substrate and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is located around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The first bonding pads are located between the first substrate and the second substrate. The connecting layer is located between the first bonding pads and the second substrate. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.