Systems, apparatuses, and methods for performing a shuffle and operation (Shuffle-Op)
US9684510B2 · kind B2 · utility
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Key dates
| Filing date | Dec 28, 2015 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Dec 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of systems, apparatuses, and methods for performing in a computer processor a data element shuffle and an operation on the shuffled data elements in response to a single data element shuffle and an operation instruction that includes a destination vector register operand, a first and second source vector register operands, an immediate value, and an opcode are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.