Computing system with non-disruptive fast memory restore mechanism and method of operation thereof
US9684520B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Oct 20, 2011 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Mar 21, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a computing system includes: monitoring a central interface for a power event; accessing a high-speed memory for pre-shutdown data; accessing a non-volatile memory during the power event for the pre-shutdown data previously stored on the high-speed memory; selecting a multiplexer for allowing external access to the high-speed memory; and formatting the pre-shutdown data in the non-volatile memory for access through a non-disruptive interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.