Concurrent design process
US9684750B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2015 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Aug 27, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a method for multi-user, at least partially concurrent, electronic circuit design. Embodiments may include receiving, at a client computing device, a user input corresponding to a change to an electronic circuit design, wherein the electronic circuit design is accessible by multiple users in an at least partially concurrent manner. Embodiments may also include implementing the change to the electronic circuit design at the client computing device without receiving authorization from a server computing device and transmitting the implemented change to the electronic circuit design to the server computing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.