Patent · US Active

High resolution timing device and radar detection system having the same

US9685961B2 · kind B2 · utility

0Cited by

2References

20Claims

0Family size

Assignee

HTC Corporation · TW

Inventors

Ta-Shun Chu · Hsinchu, TW
Ta-Chun Pu · Taoyuan, TW
Chun-Yih Wu · Taichung, TW

Key dates

Filing date	Sep 17, 2014
Grant date	Jun 20, 2017
Priority date	—
Expiry date	Oct 9, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/23
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A high resolution timing device is provided. The high resolution timing device includes a first and a second clock delay circuits. The first clock delay circuit receives an input reference clock signal to generate a first multiple frequency output clock signal, divide the first multiple frequency output clock signal to generate a first original frequency output clock signal and perform a clock-delaying process thereon according to the first multiple frequency output clock signal to generate first clock-delayed signals. The second clock delay circuit receives one of the first clock-delayed signals to generate a second multiple frequency output clock signal, divide the second multiple frequency output clock signal to generate a second original frequency output clock signal and perform the clock-delaying process thereon according to the second multiple frequency output clock signal to generate second clock-delayed signals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.