Power multiplexer for integrated circuit power grid efficiency
US9690359B2 · kind B2 · utility
1Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2015 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Sep 4, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.