Elapsed cycle timer in last branch records
US9690588B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2016 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | May 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing device implementing an elapsed cycle timer in last branch records (LBRs) is disclosed. A processing device of the disclosure includes a last branch record (LBR) counter to iterate with each cycle of the processing device. The processing device further includes at least one register communicably coupled to the LBR counter, the at least one register to provide an LBR structure comprising a plurality of LBR entries. An LBR entry of the plurality of LBR entries includes an address instruction pointer (IP) of a branch instruction executed by the processing device, an address IP of a target of the branch instruction, and an elapsed time field that stores a value of the LBR counter in response to creation of the LBR entry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.