Shift register unit, shift register and display apparatus
US9691312B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 5, 2013 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Nov 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a shift register and a display apparatus are provided. The shift register unit includes a voltage-boosting module configured to output a first level signal when receiving a gate driving signal sent from the previous stage of shift register unit; a signal output module configured to output a gate driving signal under the control of a first clock signal based on the first level signal output by the voltage-boosting module; a reset module configured to control the signal output module to reset under the control of a reset signal; and a pull-down module configured to pull down the output level of the signal output module under the control of a second clock signal. It is possible to reduce the power consumption of the integrated circuit and avoid the abnormal waveform issue due to the decay of the reset signal by employing the technical solutions of embodiments of the present disclosure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.