Zener triggered silicon controlled rectifier with small silicon area
US9691753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2016 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Apr 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/619
Abstract
A semiconductor device includes a P-type semiconductor substrate, an N-well and a P-well disposed adjacent to each other and extending along a first direction within the P-type semiconductor substrate, a first N+ doped region and a first P+ doped region extending along the first direction within the N-well and spaced away from each other along a second direction perpendicular to the first direction, a second N+ doped region and a second P+ doped region extending along the first direction within the P-well and spaced away from each other along the second direction, and a plurality of third N+ doped regions and a plurality of P+ doped regions alternatively disposed in a junction region formed between the N-well and P-well the third N+ doped regions. The third N+ doped regions and the third P+ doped regions form a Zener diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.