Method for analyzing discrete traps in semiconductor devices
US9691861B2 · kind B2 · utility
1Cited by
1References
31Claims
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Key dates
| Filing date | Jan 7, 2014 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/471
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method analyzes traps in a semiconductor device by determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change. The traps in the semiconductor device are analyzed based on lifetimes corresponding to peaks of the signal rate change.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.