Patent · US Active

Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator

US9692395B2 · kind B2 · utility

0Cited by
3References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 10, 2016
Grant dateJun 27, 2017
Priority date
Expiry dateMar 10, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/1976
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.