Buffers for driving circuits in a stand by mode
US9692416B1 · kind B1 · utility
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11Claims
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Key dates
| Filing date | Mar 21, 2016 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Mar 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer that drives components during a standby mode includes a first combination of two standard voltage threshold (SVT) transistors and two high voltage threshold (HVT) transistors that generate a logic 1 signal at a first output. A second combination of two SVT transistors and two HVT transistors generates a logic 0 signal at a second output. A power supply operates the buffer, wherein the power supply generates a voltage less that the threshold voltages of the HVT transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.