Circuit arrangement and method for coding and/or decoding
US9693068B2 · kind B2 · utility
0Cited by
17References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2014 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Feb 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/42
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In order to further develop a circuit arrangement provided for coding and/or decoding a data stream, in particular of up to 24-bit-wide R[ed]G[reen]B[lue] video signals, and a corresponding method in such way that an efficient DC-balanced coding and/or decoding is possible, in particular with the lowest possible overheads,
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.