High voltage bus-to-chassis isolation resistance and Y-capacitance measurement
US9696384B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2013 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Sep 6, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method of simultaneously calculating an isolation resistance and a y-capacitance of a RESS may include the steps of: injecting a first signal into a RESS; recording an output signal from the RESS in response to the injection of the first signal; multiplying the first signal with the output signal to determine a first product; multiplying a second signal with the output signal to determine a second product wherein the second signal is orthogonal to the first signal; filtering the first product to determine a first constant; filtering the second product to determine a second constant; processing the first constant to determine a y-capacitance value; and processing the second constant to determine an isolation resistance value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.