Patent · US Active

Integrated circuit with on-chip power profiling

US9696775B2 · kind B2 · utility

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0References

19Claims

0Family size

Assignee

Intel IP Corporation · US

Inventors

Tian Yan Pu · Dresden, DE
Chenbo Liu · Dresden, DE
Thuyen Le · Taufkirchen, DE
Lars Melzer · Dresden, DE

Key dates

Filing date	Mar 2, 2015
Grant date	Jul 4, 2017
Priority date	—
Expiry date	Sep 6, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/2273
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments include apparatuses, methods, and systems for determining a power consumption of a circuit block in an integrated circuit. The integrated circuit may include first and second power supply networks. In some embodiments, the integrated circuit may include a plurality of instances of a circuit block under test. A first instance of the circuit block may be coupled to the first power supply network during a first test run, and a second instance of the circuit block may be coupled to the second power supply network during a second test run. In other embodiments, a single instance of a circuit block under test may be coupled with the first power supply network during a first test run and coupled with the second power supply network during a second test run. The power consumption of the circuit block may be determined based on the first and second test runs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.