Multi-phase clock generating circuit and liquid crystal display panel
US9697789B2 · kind B2 · utility
0Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2015 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Nov 30, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a multi-phase clock generating circuit and liquid crystal display panel, said circuit comprising: a shift register including N shift registration units, which are cascaded with each other; a first output terminal of nth shift registration units connected to a first input terminal of an (n+1)th shift registration unit; a thin film transistor set including N thin film transistors, said control terminals of said thin film transistors of a nth stage are respectively connected to said first output terminals of (N−n+1) shift registration units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.