Patent · US Active

Data reception chip

US9697875B2 · kind B2 · utility

1Cited by

5References

10Claims

0Family size

Assignee

VIA ALLIANCE SEMICONDUCTOR CO., LTD. · CN

Inventors

Hongquan Sun · Beijing, CN
Minglu Xu · Beijing, CN
Jiajia Xia · Beijing, CN

Key dates

Filing date	Dec 15, 2015
Grant date	Jul 4, 2017
Priority date	—
Expiry date	Dec 15, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/1084
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A data reception chip coupled to an external memory including a first input-output pin configured to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and to compare the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The voltage generation module includes a first resistor and a second resistor. The second resistor is connected to the first resistor in series. The first and second resistors divide a first operation voltage to generate the first reference voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.