Shift register
US9697909B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2015 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Nov 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register comprises a first switch, a second switch, a third switch, and a fourth switch. The first switch selectively conducts a first clock signal to a first output terminal as a first output signal based on a voltage level over the control terminal. The second switch selectively forces a voltage level of the first output signal to be equal to a voltage level of a second clock signal based on both of the second clock signal and a third clock signal inverted to the second clock signal. The third switch selectively defines a voltage over the control terminal to be a first voltage based on a first input signal. The fourth switch selectively forces the voltage level over the control terminal to be equal to the voltage level of the second clock signal based on both of the second clock signal and the third clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.