Localized carrier lifetime reduction
US9698044B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2011 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Jan 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0179
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a substrate, a first power device and a second power device in the substrate, at least one isolation feature between the first and second power device, and a trapping feature adjoining the at least one isolation feature in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.