Chip package stack up for heat dissipation
US9698132B1 · kind B1 · utility
7Cited by
0References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2016 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Aug 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package stack up includes a processor chip package that has a top surface and a bottom surface, an interposer, disposed above and connected to the processor chip package top surface; a memory chip package disposed above the interposer and connected to the processor chip package through the interposer; and a processor chip package heat spreader having a bottom surface adhered to the processor chip package top surface, and having an extending portion that extends outwardly from an edge of the processor chip package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.