Integrated low voltage differential signaling (LVDS) and high-speed current steering logic (HCSL) circuit and method of use
US9698787B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2016 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Mar 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a low voltage differential signaling (LVDS) output circuit, a high-speed current steering logic (HCSL) output circuit, a bias control circuit, a programmable voltage reference circuit coupled to the bias control circuit, an output stage circuit coupled to the HCSL output circuit, a first plurality of switches to switchably couple the bias control circuit to the LVDS output circuit, a second plurality of switches to switchably couple the bias control circuit to the output stage circuit and to the HCSL output circuit and a logic control circuit coupled to the programmable voltage reference circuit, the first plurality of switches and the second plurality of switches. The logic control circuit is configured to activate either the LVDS output circuit or the HCSL output circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.