Computing system with channel quality mechanism and method of operation thereof
US9699048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2014 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | May 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/0811
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A computing system includes: an inter-device interface configured to receive receiver signal for communicating serving content contemporaneously with interference signal; a communication unit, coupled to the inter-device interface, configured to: determine interference communication scheme for representing the interference signal included in the receiver signal, and generate channel feedback information based on the interference communication scheme.A method of operation of a computing system includes generating an interference-based feedback mechanism with a control unit based on a negative feedback count, a serving metric set, a negative feedback count, or a combination thereof for controlling the channel feedback information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.