Method and apparatus for a variable frequency and phase clock generation circuit
US9703314B2 · kind B2 · utility
4Cited by
6References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 26, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Nov 23, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock generation circuit generates clock signals of a requested frequency and relative phase by dividing a reference clock signal by counting reference clock signal pulses in a counter circuit. The clock generation circuit changes the frequency, and optionally also the phase, of an output clock signal upon request, without generating glitches or missing pulses. The clock generation circuit does not alter the frequency of the output clock signal until a phase pulse associated with the requested phase is asserted, and the counter circuit is in a predetermined state, such as a reset state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.