Apparatus and method for distributed instruction trace in a processor system
US9703669B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Apr 4, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3471
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One disclosed embodiment provides an integrated circuit that has a plurality of processors and a plurality of processor trace collection logic units. Each processor trace collection logic unit corresponds with, and is operatively coupled to, one of the processors. A separate filtering logic unit is operatively coupled to the plurality of processor trace collection logic units. In some embodiments of the integrated circuit, each processor trace collection logic unit is operative to continuously collect processor trace information from a corresponding operatively coupled processor. Each filtering logic unit is operative to monitor the continuous processor trace information for occurrence of a predetermined condition, and to store some of the processor trace information to memory in response to occurrence of that condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.