Apparatus and method for synchronous hardware time stamping
US9705619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Oct 6, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus that may be used to provide timestamps to physical layer devices are provided. One method includes obtaining a time value from a clock associated with a physical layer device that is communicatively coupled to a primary data packet switch. The method further includes adding a processing time to the time value to generate a timestamp and transmitting the timestamp to a multiplexer circuit. The method further includes writing the timestamp in parallel from the multiplexer circuit to a plurality of external physical layer devices that are communicatively coupled to a secondary data packet switch and are located external to a housing of the secondary data packet switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.