Sparse graph coding scheduling for deterministic Ethernet
US9705700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Jan 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments provide techniques for transmitting data packets across a deterministic Ethernet network. Embodiments receive, at a first device in the deterministic Ethernet network, a deterministic binary schedule specifying timing information for transmitting data fragments relating to a plurality of data flows. Data packets to transmit to a destination device within the deterministic Ethernet network are received at the first device. Embodiments include fragmenting each of the data packets into two or more fragments and encoding at least one of the two or more fragments for each of the data packets with a respective sparse graph code. The encoded fragments are transmitted to the destination device, across multiple paths through the deterministic Ethernet network, according to timing information specified in the deterministic binary schedule.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.