Open-loop frequency lock methods for fast boot-up time
US9706497B2 · kind B2 · utility
3Cited by
0References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2015 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Sep 14, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method for a near field communication circuit includes entering a low power mode and subsequently determining to exit the low power mode. The method further includes generating an open loop clock signal and providing the open loop clock signal to circuits of the near field communication circuit during a low power mode exit duration. Subsequently a reference clock signal is received from a host and used to clock the near field communication circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.