Patent · US Active

Dynamic biasing circuits for low drop out (LDO) regulators

US9710002B2 · kind B2 · utility

2Cited by
1References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 3, 2015
Grant dateJul 18, 2017
Priority date
Expiry dateNov 3, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F1/465
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

Dynamic biasing circuits for low drop out (LDO) regulators are described. In some embodiments, an electronic circuit may include a low drop out (LDO) regulator; and a biasing circuit coupled to the LDO regulator, the biasing circuit configured to: monitor a first electrical current and a second electrical current; select a greater of the first or second electrical currents; and provide the selected electrical current to the LDO regulator. In other embodiments, a method may include: providing a digital core and a low drop out (LDO) regulator coupled to the digital core, wherein the digital core is configured to operate in an active mode and in a standby mode; monitoring, via a current selector circuit coupled to the LDO regulator, a first current and a second current; selecting a greater of the first or second electrical currents; and providing the selected current as a biasing current to the LDO regulator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.