Data processing validation
US9710320B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2015 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Jun 15, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing stage is described which has a communications interface arranged to receive a plurality of input data chunks. Each input data chunk has a pointer to a validation record, where the validation records are stored at a memory accessible to the data processing stage. A processor of the data processing stage is configured to create an output validation record at the memory, and to link the output validation record to the validation records of the input chunks. The processor is configured to compute an output chunk from the input chunks in a manner which ignores data of the input chunks identified as invalid through inspection of the output validation record.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.