Patent · US Active

Asynchronous FIFO buffer with Johnson code write pointer

US9710415B2 · kind B2 · utility

0Cited by

7References

20Claims

0Family size

Assignee

NXP USA, Inc. · US

Inventors

Chanpreet Singh · Noida, IN
Kshitij Bajaj · Sirsa, IN
Abhineet Kumar Bhojak · Noida, IN
Anisha Ladsaria · Noida, IN
Tejbal Prasad · Greater Noida, IN

Key dates

Filing date	Nov 3, 2014
Grant date	Jul 18, 2017
Priority date	—
Expiry date	Dec 9, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F2205/102
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An asynchronous data transfer system includes a bus interface unit (BIU), a FIFO write logic module, a write pointer synchronizer, a write pointer validator, a FIFO read logic module, and an asynchronous FIFO buffer. The FIFO buffer receives a variable size data from the BIU and stores the variable size data at a write address. The FIFO write logic module generates a write pointer by encoding the write address using a Johnson code. The FIFO read logic module receives a synchronized write pointer at the asynchronous clock domain and generates a read address signal when the synchronized write pointer is a valid Johnson code format. The FIFO buffer transfers the variable size data to a processor based on the read address signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.