Neural network processor

US9710748B2 · kind B2 · utility

Assignee

• Google LLC · US

Inventors

• Jonathan Ross · Mountain View, US
• Norman Paul Jouppi · Palo Alto, US
• Andrew Everett Phelps · Encinitas, US
• Reginald Clifford Young · Palo Alto, US
• Thomas Norrie · Mountain View, US
• Gregory Michael Thorson · Palo Alto, US
• Dan Luu · Madison, US

Key dates

• Filing date: Dec 22, 2016
• Grant date: Jul 18, 2017
• Expiry date: Dec 22, 2036

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N5/04
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.