Scan driving circuit and display device
US9711089B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 16, 2015 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Apr 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A scan driving circuit, including a multi-stage shift register unit that outputs scan signals by stage under control of a clock signal (CKR, CKBR), the shift register unit includes an output terminal for outputting the scan signals, the scan driving circuit further includes a multi-stage signal generating unit, with an n-th stage signal generating unit is connected respectively to an output terminal of an n-th stage shift register unit and an output terminal of an (n+j)-th stage shift register unit, the n-th stage signal generating unit is configured to convert an outputted first level into a second level under triggering of a scan signal outputted by the n-th stage shift register unit, and convert an outputted second level into a first level under triggering of a scan signal outputted by the (n+j)-th stage shift register unit; the n and j both are positive integers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.