Current mirror circuit and method
US9713212B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Nov 21, 2012 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | Dec 11, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/26
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided is a current mirror circuit (1) for balancing respective currents in a plurality of parallel circuit branches (2) in a target circuit (3), the current mirror circuit (1) including: a plurality of balancing transistors (4), each having a connector (5), an emitter (6), and a base (7), the collector (5) and emitter (6) of each balancing transistor (4) connected in series with a respective circuit branch (2); a selection circuit (8) that connects the circuit branch (2) having the smallest current amongst the circuit branches (2) to the bases (7) of each balancing transistor; and an isolation circuit (9) that isolates circuit branches (2) having an open circuit fault from the rest of the target circuit (3). An associated method of balancing respective currents in a plurality of parallel circuit branches (2) in a target circuit (3) is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.