Synchronous input/output using a low latency storage controller connection
US9715352B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2015 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Oct 1, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects include transmitting a synchronous I/O command to a persistent storage control unit (SCU in response to a synchronous I/O request from an operating system (OS). A unit of work in the OS corresponding to the synchronous I/O request remains active at least until the synchronous I/O request is completed. Based on an operation code of the synchronous I/O command specifying a read operation and in response to detecting that the persistent SCU has stored one or more read data records in a memory located on the processor, the firmware indicates to the OS that the synchronous I/O request is completed. Based on the operation code specifying a write operation and in response to detecting an indication from the persistent SCU that write data has been written or indicating that an error has occurred, indicating to the OS that the synchronous I/O request is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.